The present invention relates to a method and apparatus for extracting data. Such a method and apparatus are usually used in any kind of microprocessors or micro controllers. Internally, data are represented in different registers of the register file of a microprocessor or micro controller. A 32-bit microprocessor can have a register file containing, for example, thirty-two 32 bit wide registers. For many purposes, 32 bits are not enough to represent a specific data. Therefore, for example, two registers are concatenated to form a 64-bit register. For processing data having this specific data size of 64 bits, special instructions are provided. One of these instructions is the so-called extracting instruction which provides the ability to extract a certain number of bits out of a data word represented by two or more registers. Such an instruction is, in particular, used to normalize data, for example, the result of a DSP filter accumulation.
FIG. 1 shows a diagram representing the effect of an extracting instruction. Numerals 1 and 2 indicate registers which are concatenated to form a single 64-bit data register. Therefore, each register 1 and 2 has a width of 32 bits. The extracting instruction is able to extract 32 bits of the 64-bit word and store it in a register 3 representing the result of the operation. As mentioned above, the extracting instruction concatenates two data register sources to form a 64-bit value from which 32 consecutive bits are extracted. Such an operation can be thought of as a left shift by the number of bits followed by the truncation of the least significant 32 bits of the result. The value of the number of bits comes from either a data register or from an immediate data stored within the instruction. Therefore, such an instruction usually has up to four parameters indicating the registers containing the 64-bit value, a parameter indicating the value of the position of the extracting word within the 64-bit register, and a register to write the result to.
As mentioned before, such an extracting instruction can be used to normalize the result of a digital signal processor filter accumulation in which a 64-bit accumulator is used for several guard bits. The value of the position within the 64-bit accumulator can be determined by using the count leading signs instruction. The extracting instruction can also be used to perform a multi-bit rotation by using the same source register for both of the sources that are concatenated.
U.S. Pat. No. 5,295,250 shows a microprocessor with a barrel shifter. The barrel shifter serves as a shift unit which is controlled by a microprogram and operated by micro instructions for performing extraction, insertion and comparison of consecutive bit strings in word data.
To perform such an instruction, usually a shifter having the size of the respective register is necessary. In FIG. 1, it is assumed that the word to be extracted starts at bit position 21 and ends at bit position 53. A 64-bit shifter would therefore be necessary to shift the content of the 64-bit register 1, 2 by 10 bits to the left and store the result in register 3. FIG. 1 of U.S. Pat. No. 5,295,250 shows such an arrangement whereby numeral 104 indicates the barrel shifter.